Armv8 Architecture: Exception Level and Exception state

Description

Smartphones, AI System-on-Chip (SoC), Electric Vehicle Automotive (Infotainment, Autonomous Driving), and Arm processors used in cloud servers and MacBooks are all based on the Armv8-A architecture, which is a 64-bit Cortex-A processor (e.g., Cortex-A53, Cortex-A57, Cortex-A72). Currently, in the system software industry, knowledge of the Armv8-A architecture is considered essential as it is in high demand.

This lecture covers the Exception level, that is the key feature of Armv8-A architecture necessary for the development of software systems.

• Concept of Exception level

• How to change Exception level

• System register to identify current Exception Level

• Assembly routine to read current Exception Level

• The execution state in Armv8

To understand entire features of Armv8, the first concept to know is Exception level. This lecture explains the details of Exception level by explaining 'how to change its exception level' and 'relevant system register(CurrentEL)' to identify current Exception level.

In addition the workflow is exception in Armv8 is introduced as a way to understand how exception level is changed. The reference code is analyzed based on XEN and Linux kernel.

In general, a piece of software, such as an application, the kernel of an operating system, or a hypervisor, occupies a single Exception level. So understanding of Exception level is crucial.

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