FPGA Image Processing

Real Time Sobel System Implement

Ratings 3.32 / 5.00

What You Will Learn!

FPGA real time image processing basic knowledge
Sobel principle, algorithm and system implement in FPGA;
RGB to Grayscale, Grayscale to RGB coding and simulation;
Read, write BMP file skill in FPGA image processing simulation;
Single, double line FIFO Buffer coding and simulation;
Pipeline Principle, coding and simulation skill;

Description

The SOBEL image processing is a very popular algorithm for edge detection used to identify and highlight the object boundaries within an image. It has been implemented in all kinds of programming languages. Basically, it performs a 2D spatial gradient operation on one image. It primarily provides the areas of high spatial frequency corresponding to edges.

The SOBEL algorithm requires the calculation as fast as possible, and run lots of operation at the same time. FPGA can process many data at the same time, which is one of the best way to implement the SOBEL algorithm. However, the software program needs high skill and special knowledge. Here we demo the basic knowledge and skill, hope it can be the base for the FPGA image real time processing.

This course only focuses on sobel image processing coding and simulation for FPGA. Note: Though the hdmi and camera interface have been mentioned, they are NOT implemented in the course. It demos the basic knowledge and skill about FPGA real time image processing in verilog, including:

(1) Sobel principle, algorithm and system implement in FPGA;

(2) RGB to Grayscale, Grayscale to RGB coding and simulation;

(3) Read, write BMP file skill in FPGA image processing simulation;

(4) Single, double line FIFO Buffer coding and simulation;

(5) Pipeline Principle, coding and simulation skill;

(6) Verilog real time processing coding skill;