What You Will Learn!
- This course is the sixth in the series of courses offered in the curriculum for Radio Frequency Circuits and Systems covering phased-locked loops (PLLs).
- The objective of this course is to give a thorough understanding of phase-locking concept and PLL design.
- The course builds upon the fifth course on Oscillators offered in the curriculum for Radio Frequency Circuits and Systems.
- This course provides several examples and design cases that give better insight about the operation of the PLL.
Description
This course focuses on the study and design of phase-locked loops and the concept of phase-locking. We will learn that a phase-locked loop is essentially a closed-loop system that tracks an external periodic signal. A phase detector detects the phase difference between the reference and the signal coming from the oscillator within the loop. This phase difference is then extracted by a lowpass filter (LPF). The LPF output then controls the oscillation frequency of a voltage-controlled oscillator (VCO) in a way that in the steady state, the VCO output frequency is exactly equal to that of the input. In practice, a frequency divider chain is inserted between the VCO and the phase detector input to realize a closed-loop frequency multiplier. We will learn about the tracking characteristics of a PLL, and will see that the capture (acquisition) process is a nonlinear phenomenon. The course then digs deep into the phase detector implementation followed by the concept of phase-frequency detector. This will lay the groundwork for type-II PLL. We will specifically study a widely used type-II PLL, called charge-pump PLL. We will study the dynamic behavior of the charge-pump PLL and derive the PLL transfer function. We will learn that due to non-idealities, frequency fluctuation will appear at the output of the charpe-pump PLL . We will go through the issues due to these non-idealities and present some problems. The VCO phase noise and the noise coming from the input reference degrade the PLL output phase noise. We will study the impact of these sources of noise on the PLL phase noise. The course will then go through the concept of the delay-locked loop (DLL) and its applications. The course will finally discuss applications of the phase-locked loop. We will see the frequency synthesis in many electronic circuits will be realized by a PLL. We will see that PLL can effectively be used to realize a powerful skew reduction technique.
Who Should Attend!
- This course is intended for graduate students and design engineers who pursue a career in analog and radio-frequency circuits.
